1. Field of the Invention
The present invention relates to a semiconductor device in which a ferroelectric substance material or a high dielectric constant material is mainly used as a capacitor insulating film and a method of manufacturing the same.
2. Statement of the Problem
Recently, development has been made in the area of semiconductor devices concerning a non-volatile memory having a capacitor device region in which a ferroelectric substance material, such as Pb(Zr,Ti)O3 and SrBi2Ta2O9, having a hysteresis characteristic is used as a capacitor insulating film, and concerning a dynamic random access memory in which a capacitor device region has a large quantity of stored electric charges by using a high dielectric substance material, such as (Sr,Ba)TiO3, as the capacitor insulating film.
It has been known that deterioration of an insulating characteristic and a ferroelectric characteristic occurs in the dielectric substance, such as Pb(Zr,Ti)O3 and (Sr,Ba)TiO3, used in the above semiconductor device, when the dielectric substance is subjected to a reduction atmosphere because the dielectric substance is formed by an oxide. In particular, when the dielectric substance is exposed to hydrogen, the device characteristics deteriorate critically. In the extreme case, peeling of an electrode may be caused to occur.
However, a hydrogen atmosphere inevitably is produced in a manufacturing process of the semiconductor device, such as a large scale integrated circuit (xe2x80x9cLSIxe2x80x9d). For example, a SiO2 film which is used as an interlayer insulating film is generally formed by the use of a chemical vapor deposition (xe2x80x9cCVDxe2x80x9d) method. The reaction is represented by SiH4+O2xe2x86x92SiO2+2H2. This reaction formula indicates that the hydrogen is generated as a reaction product. Further, the CVD of tungsten (xe2x80x9cWxe2x80x9d) tends to be widely used to embed a contact hole having a large aspect ratio as the device size becomes small. In this case, the W is deposited by the reaction which is represented by 2WF6+3SiH4xe2x86x922W+3SiH4+6H2. This reaction formula indicates that the reaction is carried out in a very strong reduction atmosphere. In addition, an annealing process is performed in an atmosphere containing the hydrogen to ensure the characteristic of a MOS transistor after the formation of an Al wiring pattern.
Means for preventing the dielectric capacitor from deteriorating due to the hydrogen has been adopted in several semiconductor devices, as known in the art. For example, disclosure is made in Japanese Unexamined Patent Publication No. H4-102367 of a semiconductor device, illustrated in FIG. 27, which has a TiN film or a TiON film formed on an interlayer insulating film 16 of a capacitor portion 19 as a hydrogen barrier film 17. In the structure illustrated in FIG. 27, a device isolation oxide film 2, an interlayer insulating film 6, a lower electrode 8, a capacitor insulating film 9, an upper electrode 10, an interlayer insulating film 13, a wiring layer 14, an interlayer insulating film 16, and a hydrogen barrier film 17 are successively deposited on a silicon substrate 1 in this order. Further, a gate electrode 5 is formed on a gate oxide film 4 between impurity diffusion regions 3 in the silicon substrate 1.
Alternatively, AIN or Ti3N4 is formed on an upper electrode 10 of a capacitor portion 19 as a hydrogen barrier film 11 in the structure illustrated in FIG. 28 in the case of a dielectric memory which is disclosed in Japanese Unexamined Patent Publication No. H7-111318. On the other hand, Si3 N4 is formed on the entire surface of the device as a hydrogen barrier film 12 in the structure illustrated in FIG. 29.
More specifically, a device isolation oxide film 2, an interlayer insulating film 6, a lower electrode 8, a capacitor insulating film 9, an upper electrode 10, a hydrogen barrier film 11, an interlayer insulating film 13 and a wiring layer 14 are successively deposited on a silicon substrate 1 in this order in the structure illustrated in FIG. 28. Further, a gate electrode 5 is formed on a gate oxide film 4 between impurity diffusion regions 3 in the silicon substrate 1. In the structure illustrated in FIG. 29, a device isolation oxide film 2, an interlayer insulating film 6, a lower electrode 8, a capacitor insulating film 9, an upper electrode 10, a hydrogen barrier film 11, a hydrogen barrier film 12, an interlayer insulating film 13 and a wiring layer 14 are successively deposited on a silicon substrate 1 in this order. In this case, the hydrogen barrier film 12 is formed to cover the lower electrode 8, the capacitor insulating film 9, the upper electrode 10 and the hydrogen barrier film 11. In addition, a gate electrode 5 is formed on a gate oxide film 4 between impurity diffusion regions 3 in the silicon substrate 1.
Where the hydrogen barrier film 17 is formed on the interlayer insulating film 16 of the capacitor portion 19 like the conventional semiconductor device illustrated in FIG. 27, the hydrogen barrier film 17 must cover the capacitor portion 19 with a space area of several microns or more from the capacitor portion 19 to prevent the invasion of the hydrogen from a lateral direction. However, cell area has been reduced with the high integration of memories, and the cell area of a highly integrated memory of 256 Megabit or more is 1 xcexcm2 or less, as disclosed in Nikkey Micro Device, March 1995, at page 31. In such a case, the area of the hydrogen barrier film 17 over the capacitor portion 19 must be equal to or less than the cell area. Consequently, the invasion of the hydrogen from the lateral direction cannot sufficiently be prevented. In addition, the conventional semiconductor device is not effective at all for avoiding deterioration of the capacitor portion 19 due to the hydrogen where CVD of W is used for the wiring layer, since the hydrogen barrier film is formed over-the wiring layer 14.
Further, the other conventional semiconductor device illustrated in FIG. 28 is not effective at all for avoiding the invasion of the hydrogen from the side portion. In addition, the characteristic of the MOS transistor which is ensured by the hydrogen anneal is hindered after the formation of the Al wiring pattern in the other conventional semiconductor device illustrated in FIG. 29, since the Si3N4 film is formed for the entire surface of the device. In this case, the hindrance of the hydrogen annealing effect from the formation of Si3N4 film has been widely known as described in PROCEEDINGS OF THE SYMPOSIUM ON SILICON NITRIDE THIN INSULATING FILMS, 1983, pages 94 to 110.
3. Solution to the Problem
In the semiconductor device according to this invention, the capacitor portion is directly covered with the hydrogen barrier film and further, the hydrogen barrier film, except for a part covering the capacitor portion, is removed. Consequently, the characteristic of the MOS transistor is not adversely affected, and the deterioration of the capacitor portion can be effectively avoided.
According to this invention, there is provided a semiconductor device which has a capacitor portion including a ferroelectric substance material or a high dielectric constant material as a capacitor insulating film. The capacitor portion is covered with a hydrogen barrier film, and the remaining portion excepting the capacitor portion is uncovered with the hydrogen barrier film.
A method of manufacturing the semiconductor device according to this invention includes a step of forming the capacitor portion comprising a lower electrode, a capacitor insulating film of ferroelectric substance material or high dielectric constant material and an upper electrode, a step of forming the hydrogen barrier film for covering the capacitor portion, and a step of removing a part of the hydrogen barrier film by etching.
A feature of the invention is a semiconductor device having a capacitor portion covered by a hydrogen barrier film, and a portion having no hydrogen barrier film.
Another feature of the invention is a contact portion on the capacitor portion, formed by removing a portion of hydrogen barrier film from the capacitor portion.
Another feature of the invention is a nonconductive hydrogen barrier film containing at least one material selected from the group consisting of Si3N4, SiON and a combination of Si3N4, SiON and SiO2.
Another feature of the invention is an electrically conductive hydrogen barrier film comprising at least one material selected from nitrides of the group consisting of Ti, Zr, Nb, Ta, Hf and W.
Another feature of the invention is the utilization of an electrically conductive hydrogen barrier film as the upper electrode of a memory capacitor.
In a first basic embodiment, the invention comprises a substrate and a transistor portion having a gate oxide film on the substrate, a gate electrode on the gate oxide film, and an impurity diffusion region in the substrate. It further includes a capacitor portion containing a capacitor insulating film and having a surface. A hydrogen barrier film is located on the surface of the capacitor portion. A contact portion is formed on the surface of the capacitor portion by removing a portion of the hydrogen barrier film from the capacitor portion. The contact portion is for electrically contacting the capacitor portion to the transistor portion. The capacitor portion does not overlap the transistor portion.
In one variation of the first basic embodiment of the invention, a nonconductive hydrogen barrier film is formed on an interlayer insulating film, then a lower electrode and a capacitor insulating film are formed. Then an upper electrode and a conductive hydrogen barrier, or alternatively just a conductive hydrogen barrier serving also as an electrode, are formed. These films are patterned, and then the patterned surface is covered with a second nonconductive hydrogen barrier film. A contact hole is made in the second nonconductive hydrogen barrier film to form a contact portion on the conductive film below.
In another variation, the upper electrode is formed on the capacitor insulating film, the films are patterned to form a capacitor, then the second nonconductive hydrogen barrier film is formed to cover the surfaces of the capacitor. Then a portion of the nonconductive hydrogen is removed to form a contact hole and a contact portion on the upper electrode. Then a conductive hydrogen barrier film is formed to fill the contact hole and cover the contact portion and the top of the capacitor portion. Alternatively, an interlayer insulating film can be formed on the second nonconductive hydrogen barrier film, a contact hole made through both the interlayer insulating film and the second nonconductive hydrogen barrier film, and then the contact portion covered with the conductive hydrogen barrier film In another second basic embodiment, the invention comprises a substrate and a transistor portion having a gate oxide film on the substrate, a gate electrode on the gate oxide film, and an impurity diffusion region in the substrate. It further includes a plurality of capacitor portions, each having a lower electrode and a capacitor insulating film, each of the capacitor portions overlapping a transistor portion. Each capacitor portion is located over a plug, which is electrically connected to the transistor portion. A first, nonconductive hydrogen barrier film is formed on an interlayer insulating film. A second, electrically conductive hydrogen barrier film is formed on the first, nonconductive hydrogen barrier film and the plug. A lower electrode is formed on the second, conductive hydrogen barrier film. The lower electrode and the second, conductive hydrogen barrier film are patterned to form a patterned surface. The capacitor insulating film is formed on the patterned surface and then it is removed from the surface except not from the top and side surfaces of the capacitor portion. A third, conductive hydrogen barrier film is formed on the capacitor insulating layer and the first, nonconductive hydrogen barrier film. Then the third, conductive hydrogen barrier film and the first, nonconductive hydrogen barrier film are removed from the underlying interlayer insulating film, but not from the capacitor portion. Thus, the capacitor portions are covered by hydrogen barrier film, but there is a portion between the capacitor portions that is not covered.
A first variation of the second basic embodiment includes a first, electrically nonconductive hydrogen barrier film formed on the plug and on the interlayer insulating film, as described above, but the capacitor insulating film is patterned in the same process as the third, conductive hydrogen barrier film and the nonconductive hydrogen barrier film. In a second variation, no nonconductive hydrogen barrier film is formed on the interlayer insulating layer, and a second, conductive hydrogen barrier film, the capacitor insulating film, and a first, conductive hydrogen barrier film are patterned in the same process.
A feature of the invention is that the capacitor insulating film may contain a ferroelectric substance material or a high dielectric constant material. The ferroelectric substance material is a ferroelectric metal oxide, such as Pb(Zr,Ti)O3 and SrBi2Ta2O9. The high dielectric constant material is a non-ferroelectric dielectric metal oxide, such as (Sr,Ba)TiO3.